Analysis of a Digitizer Circuit With T-Network for Low-Resistance Measurement
Shiraz Sohail, Gopal Singh, Tarikul Islam · IEEE Transactions on Instrumentation and Measurement · 2025
An efficient interfacing circuit designed for measuring low resistance (RX, less than 1 Ω) and generating a digital output is presented. The digitizer (resistance to digital converter, RDC) circuit utilizes a dual-slope integrator with a T-network in feedback, three single pole single throw (SPDT) switches, and a comparator. Conventional dual-slope integrators face challenges when measuring lowRXconnected to the inverting terminal, as the high input current causes the op-amp to saturate. Reducing the input voltage to even 0.01Vdoesn’t resolve this issue. Alternatively, connectingRXin feedback produces a low output voltage that is susceptible to inherent circuit noise, leading to significant measurement errors. Consequently, no digitizers have been developed to accurately measureRXbelow 10 Ω so far. The circuit overcomes these limitations by using a T-network which enables the incoming current (IX, 98.09 - 71.75 μA) throughRXto amplify the feedback current (IC), hence significantly improving sensitivity which is a novel feature. During charging, lead resistance (RL) with fixed resistanceR3(orRX) is measured, while during discharging,RXandRLare measured together. SubtractingRLensures accurateRXmeasurement, independent ofRL, in a two-wire configuration. The circuit is experimentally tested forRXin the range of 0.1 - 0.9 Ω (full span) in which the power dissipation ranges from 0.96 - 4.63 nW, while the measurement time varies from 1.29 - 1.51 s. The circuit yields accurate results with an average error of ± 0.68% across the full span ofRX.