Efficient Large Scale Neural Network Acceleration With 3-D FeNOR-Based Computing-in-Memory Design
Yang Feng, Dong Zhang, Chen Sun, Zijie Zheng, Yue Chen, Qiwen Kong, Gan Liu, Xiaolin Wang, Yuye Kang, Kaizhen Han, Zuopu Zhou, Leming Jiao, Jixuan Wu, Jiezhi Chen, Xiao Gong · IEEE Transactions on Electron Devices · 2025
In this work, we introduce and experimentally demonstrate a 3-D stacked ferroelectric nor (FeNOR) memory, featuring a back-end-of-line (BEOL) zinc oxide (ZnO) channel, and a metal–ferroelectric–metal–insulator5 semiconductor (MFMIS) unit cell. The main contributions of this work are as follows: 1) enhanced memory window (MW) and high ON/OFF ratio: The MFMIS architecture in 3-D FeNOR enables a tunable and large MW (~4 V), as well as an ON/OFF ratio (Ion/Ioff) of six orders of magnitude; 2) low operation voltage and high endurance: The integration of ferroelectric materials allows for low operation voltages (~4 V) and excellent endurance (107cycles); 3) efficient neural network implementation: Leveraging the 3-D FeNOR structure, we further develop VGG-16 and ResNet-50 convolutional neural networks that achieve high prediction accuracy, decent area efficiency, and low power consumption. The emergence of 3-D FeNOR technology positions ferroelectric devices as a highly promising candidate for computing-in-memory (CIM) applications.