Implementation of a Watchdog timer’s Microarchitecture and design for a RISC-V-based SoC using 45nm Technology
D J Chaithanya, Anoushka Ameet Kurthukoti, Yajnika S. Nandi, M S Harshitha, U Parvitha, A Pavan Athreya · 2024
WDT in safety-critical Embedded systems, such as the one used for airborne application requires that it be highly dependable and take care of operation time-related failures automatically and transparently to ensure high dependability can be achieved with their use. In developing such a WDT, one challenge is taking an existing off-the-shelf capable device, which is typically highly specialized for singlepurpose end-doing approaches. This work helps to resolve this challenge by developing a next-generation programmable WDT and using it in various applications. The WDT that will be proposed is a processor-based real-time system where the capabilities and activities in the processor are significantly more common. The effectiveness of the proposed WDT is assessed using simulation results to determine its capability to identify the kind of defects and to take pertinent actions. Test benches have been integrated to create errors in the design and track a system’s operation, which is necessary for the WDT to function properly. Verilog HDL, a hardware description language widely used in digital circuit design, is utilized to create WDT. The goal of this work is to provide generalizable WDT that may be used in a variety of contexts, including ones that are safety focused. To ensure that the WDT is operating as intended and that it can be depended upon for handling the process duration during failure, simulation, and test benches are employed.