Efficient Signal Processing: Harnessing Distributed Arithmetic for High-Speed FFT Operations
M. Bharathi, Krithikaa Mohanarangam, Yasha Jyothi M Shirur · 2025
The present article introduces a novel approach to significantly enhance the computational efficiency of modern Digital Signal Processing (DSP) processors. The algorithm enhances the efficiency of Sum of Products (SOP) operations, which are essential for real-time signal processing applications, by utilizing Distributed Arithmetic (DA) techniques for the Fast Fourier Transform (FFT) and its inverse (Inverse FFT) (IDFT) computations. The present study undertakes an exhaustive quantitative analysis to assess the computational delays of the proposed 2, 4, and 8-point Fast Fourier Transform (FFT) and Inverse Discrete Fourier Transform (IDFT) across various bit representations (4, 8, and 16-bit). For example, when using 4-bit representations, the computational delays for a 2-point Fast Fourier Transform (FFT) are measured to be 13.318ns, 30.629ns for a 4-point FFT, and 27.779ns for an 8-point FFT. Similarly, the delays for the 2-point Fast Fourier Transform (FFT) in an 8-bit representation are 13.727ns, the 4-point FFT in 22.276ns, and the 8-point FFT in 30.592ns. The study further includes the addition of appropriate delays for IDFT operations, which enhances the understanding of the effectiveness of the approach suggested in various scenarios. Furthermore, the research presents and evaluates three distinct categories of transforms, namely 2-point, 4-point, and 8-point FFT and IDFT structures. These structures utilize different quantities of Look-Up Tables (LUTs) for computational purposes. The research showcases the exceptional computing efficiency of the suggested design through detailed quantitative analysis, emphasizing its potential advantages in improving DSP implementations in practical situations.