Hybrid Deadlock Recovery Algorithm for Irregular NoC in Multi-Chiplet Systems
Zhiqiang Chen, Yongwen Wang, Hongwei Zhou · 2024
Dividing a single System-on-Chip (SoC) into multiple chiplets and connecting them using 2.5D packaging technology is becoming a widely adopted approach to enhance chip scale and performance. However, when multiple chiplets are integrated to form a chiplet-based system, the Network-on-Chip (NoC) that interconnects these chiplets can be susceptible to deadlock. Additionally, modularity is a specific concern, as it involves integrating chiplets of different functions, sizes, manufacturing processes, and so on. However, physical layout constraints and potential vertical link failures may result in irregular topologies, which further complicates the design of both fault-tolerant and load-balanced routing algorithms. To tackle these challenges, a Hybrid Deadlock Recovery algorithm for Irregular NoC (HDRI) in multi-chiplet systems is proposed. This algorithm shows adaptability in irregular topologies, additionally exhibiting fault-tolerance capabilities. HDRI features two modes that can dynamically adapt to the network status. Upon detecting a deadlock, it recovers from the deadlock through the coordination of inter-chiplet packets. To be specific, HDRI seeks to break the deadlock by either forwarding or recycling the blocked packets, which respectively correspond to low and high load modes. Experimental results demonstrate that HDRI offers a 7.5% reduction in latency and an area overhead of less than 1.1%.