Neural Manifold Learning Based on 40 nm Dual-Mode PCM Compute-in-Memory Chip with Hardware Adaptive Drift Compensation

Longhao Yan, Yuqi Li, Xi Li, Zelun Pan, Zeyu Wang, Xile Wang, Bowen Wang, Zhe Zhan, Xiyuan Tang, Yaoyu Tao, Woo‐Ping Ge, Zhitang Song, Ru Huang, Yuchao Yang · 2024

Neural manifold learning (NML), as a significant research topic in the field of neuroscience, plays a vital role in the realization of intelligent brain-computer interface (BCI) at the edge. However, traditional edge computing platforms fall short in meeting the demands for the huge computing power needed to process massive neural data. Here, we design a 288Kb dual-mode phase change memory (PCM) compute-in-memory chip in 40nm technology and utilize its two cores for two fundamental kernels in NML, vector matrix multiplication (VMM) and true random number generation, and develop a PCM-based NML system for the first time. In particular, in order to mitigate the performance degradation caused by PCM conductance drift, we propose a novel adaptive-PCM-drift-compensation scheme that significantly improves the accuracy of VMM results. Compared with CPU platforms running the same tasks, the resulting chip improves the computing energy efficiency and throughput by$476\times$and$264\times$, respectively.

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