Dataflow microprocessor: development, trends, and challenges
Jingwen Leng, Minyi Guo, Deze ZENG, Wenbin Jiang, Xiaochun YE, SHuaxi CHEN, Wenming Li · Scientia Sinica Informationis · 2025
This paper explores the potential and trends of novel dataflow architectures in multi-domain integrated computing. Traditional von Neumann and domain-specific architectures struggle to meet the high performance and flexibility demands of emerging technologies like artificial intelligence, graph computing, and big data. We review current dataflow chip design methods, discussing their implementations based on specialization vs. generalization and execution granularity. Based on this, we propose a dataflow abstract machine model using concurrent code blocks, with a complete instruction set and microarchitecture. This model achieves unified intermediate representation across domains and integrates multiple operator fusion strategies, enhancing efficiency in tasks such as graph neural networks, large model computations, and real-time signal processing. Experimental results show that our processor outperforms existing general-purpose architectures in performance and power consumption. We conclude by highlighting the broad application prospects of dataflow architectures in future computing systems and their significant impact on efficient computing.