Precision enhancement through truncated multiplier design in filter structure applications
Mahesh Babu Kota, Raja Suresh, E. Anant Shankar, L.V. Mahesh · 2025
Significant improvements are offered by truncated in terms of latency, power, and area. In the end, the paper that is being given reduces the number of adders that are needed to reduce trees. It is feasible to save space in experiments by using this suggested approach. Ultimately, activities are implemented to achieve the outcome, which compresses the least significant bit (LSB) component. Error compensation circuits were used in earlier research to reduce truncation error. This project’s truncation mistake won’t be greater than one unit of least position (ULP). Consequently, there will be no need for error correcting circuits, and the output will be exact. Finite impulse response (FIR) filter is used for design implementation in order to broaden the project’s scope.