A PCIe-Based Inter-Processor Messaging Architecture
Xujie Zhao, Xiaoli Zhi · 2024
With the increasing number of processors in modern vehicles and the growing demand for inter-processor coordination, there is an urgent need for a high-performance, high-reliability one-to-many data transmission solution. Addressing the data transmission and messaging requirements between processor systems in automotive electronics, this paper designs and implements a PCIe-based messaging architecture for multiprocessor systems. By integrating scatter-gather DMA technology, the proposed solution significantly enhances both the efficiency and reliability of data transmission in multi-processor environments, providing a feasible and efficient approach to meet the increasingly complex data transmission needs in modern automotive electronics. Initially, this paper constructs a multi-host transmission architecture that does not rely on a PCIe switch by configuring one node in the multi-host system as an RC (Root Complex) controller and the remaining nodes as endpoint devices. Subsequently, based on this PCIe transmission architecture, a message publish-subscribe scheme is developed, which effectively organizes and schedules data transmission among multiple processors. Finally, by incorporating the scatter-gather DMA transmission method, the paper achieves unified message delivery from different publishing nodes, thereby improving transmission efficiency in scenarios involving non-contiguous message transfers. Experimental results demonstrate that the proposed messaging architecture effectively satisfies the communication require-ments between processors, showcasing its practicality in real-world applications. The architecture exhibits superior performance in message transmission rates, achieving an approximately 27% improvement compared to traditional PCIe methods.