Performance Analysis of 8/16/32-bit Calculator Using Verilog and System Verilog
Meghashri Saravanan, J. Saritha, S.Sree Vishnu Varthini, R.Sri Sathya Priya, R.Sri SivaSakthi, Shiromani Balmukund Rahi · 2024
A versatile and effective calculator architecture that supports operations in 8, 16, and 32-bit configurations is shown in this work. It is implemented in Verilog and System Verilog. The design incorporates the fundamental arithmetic operations of addition, subtraction, multiplication, and division, along with more complex capabilities like exponentiation, square root, and factorial computations. Additionally, it has shift capabilities and bitwise operations for efficient binary data manipulation. This architecture offers a strong answer for research, engineering, and programming applications where accuracy and flexible bit-width processing are crucial by combining fundamental and sophisticated computational capabilities.