Application of Machine Learning Approaches for Power Estimation of Digital VLSI Circuits at Register Transfer Level
Chinmay Parmar, Manish I. Patel · 2024
In VLSI, estimation of power, performance, and area at appropriate steps during the design process is necessary to meet required specifications. In digital VLSI circuit design, early-stage power estimation helps in making decisions, such as selecting architecture options and design choices. Recently, machine learning is being used for power estimation. In this work, machine learning-based power estimation at the RTL level is proposed. Datasets are crucial for machine learning; however, they are relatively scarce in VLSI applications. A dataset for power estimation was generated using Cadence EDA tools with the help of Python and TCL scripts for automation. Various machine learning models were then applied, and the best-performing six models were evaluated based on R-squared and Root Mean Square Error (RMSE) as performance metrics.