RaPC: Raw Bit Error Rate Aware Polar Coding for 3-D nand Flash Memory
Ruifeng Tu, Meng Zhang, Changsheng M. Xie, Fei Wu · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2025
Reliability challenges like random telegraph noise (RTN) and intercell electrostatic interference have gotten worse as feature sizes in planarnandflash memory continue to reduce. In order to improve storage capacity, 3-D stacking ofnandflash memory has emerged as the preferred development path. However, additional challenges are brought about by the switch to 3-Dnandflash, such as shorter lifespans and lower reliability as a result of higher integration densities and intricate vertical interference. This article proposes RaPC: a raw bit error rate (RBER) aware polar coding scheme for improving data reliability of 3-Dnandflash memory. According to the variation of the RBER, the error correction ability of the polar code is dynamically adjusted to correct bit errors, which ensures the reliability and reduces the decoding delay. Simulation results demonstrate that RaPC offers significant advantages in decoding latency and performance over conventional low-density parity-check (LDPC) codes within specific RBER ranges, making it a promising solution for enhancing the reliability of 3-Dnandflash memory.