SSD Backplane Tests: Prototype Module Version BP1
USDOE Office of Science (SC), High Energy Physics (HEP), Merle Haldeman, C. Needles, J. C. Urish · 1990
This backplane is installed in a FASTBUS crate as defined in IEEE 960. It is a component part of a readout system for. Silicon Strip Detectors used in experiments at Fermilab. The crate is populated as shown in Figure 1. The backplane is rnade in one piece to simplify the assembly of these crates. This will eliminate the requirement for external power connections to the Auxiliary connectors.