Hardware-Accelerated Kernel-Space Memory Compression Using Intel QAT

Qirong Xia, Houxiang Ji, Yang Zhou, Nam Sung Kim · IEEE Computer Architecture Letters · 2025

Data compression has been widely used by datacenters to decrease the consumption of not only the memory and storage capacity but also the interconnect bandwidth. Nonetheless, the CPU cycles consumed for data compression notably contribute to the overall datacenter taxes. To provide a cost-efficient data compression capability for datacenters, Intel has introduced QuickAssist Technology (QAT), a PCIe-attached data-compression accelerator. In this work, we first comprehensively evaluate the compression/decompression performance of the lateston-chipQAT accelerator and then compare it with that of the previous-generationoff-chipQAT accelerator. Subsequently, as a compelling application for QAT, we take a Linux memory optimization kernel feature: compressed cache for swap pages (zswap), re-implement it to use QAT efficiently, and then compare the performance of QAT-basedzswapwith that of CPU-basedzswap. Our evaluation shows that the deployment of CPU-basedzswapincreases the tail latency of a co-running latency-sensitive application, Redis by 3.2-12.1×, while that of QAT-basedzswapdoes not notably increase the tail latency compared to no deployment ofzswap.

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