An Efficient 8-Bit Adder/Subtractor Design Utilizing Reversible Logic Techniques

Aruru Sai Kumar, Kapil Kumar, U. Siddhesh, Golconda Bhavani, G Harshitha, Guduru Niharika · 2024

Reversible logic gates are essential for quantum computing and low-power digital circuits as they enable the recovery of input signals from output signals, thereby minimizing energy dissipation. This field of study has become a leading-edge research domain, driving innovative advancements focused on optimizing resource efficiency. This study introduces an efficient 8-bit adder/subtractor circuit designed using Feynman and HNG reversible logic gates. The circuit incorporates a control bit (M) that dictates its operational mode: M=0 signifies addition functionality, while M=1 indicates subtraction functionality. This dual functionality is achieved with substantial efficiency enhancements, as evidenced by a 22% decrease in quantum cost compared to traditional methods. The design also boasts a reduced total reversible logic implementation cost, underscoring its efficiency. Validation and simulation of the reversible 8-bit adder/subtractor circuit are conducted using Xilinx Vivado 2022.2 software

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