The Case for Coherence Directories in Memory Cubes
Yuki Kameyama, Naoya Niwa, Daichi Fujiki, Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano · 2024
Memory Cube (MC) is a memory module managed by stacking DRAM chips three-dimensionally and placing a logic layer on the bottom layer. The logic layer has a routing function and can route packets to their destinations. A Memory-centric Network (MCN), which constructs a memory network by interconnecting multiple MCs, has been considered to improve communication bandwidth. In conventional MCNs, each coherence directory that manages data coherence is located on the processor side. When accessing an MC managed by another processor, it is necessary to access it to check the sharer information stored on the processor side. This communication overhead would be significant, especially in write accesses where invalidation signals and ACKs are communicated. This significant overhead problem is caused by the placement of the coherence directory in the MCN. In this study, we propose a new MCN that integrates a coherence directory into the logic layer of the MC, and the MC manages the coherence of its data. This coherence directory eliminates the need to access other processors when checking the sharer information and reduces the number of message hops and latency for coherence management. Our simulation results show that the proposed MCN outperforms by 31% on average the conventional MCN on 4 4 dmesh network topology. The proposed MCN takes only 8%×larger hop counts than the ideal MCN.