FPGA Implementation of a Concatenated KP4 and Hamming Code for Forward Error Correction
Chuanji Yan, Feng Tian, Yucai Tian, Yutian Li, Ze Dong, Qi Zhang · 2024
We implemented concatenated KP4-Hamming codes on an FPGA. The different convolutional interleaver structures are proposed and demonstrated. The results show that the best structure can achieved a BER of 3.27e-16 at a SNR of 8.9.