Vedic Multiplier Based 32 Bit MAC Unit Using Nikhilam Sutra and Urdhva Triyakbhyam Sutra with Different Adders
G. Priyanka, Namineni Gireesh, S. Hemachandra · 2024
This paper investigated the performance of Vedic multipliers in a 32-bit Multiplier-Accumulator Unit (MAC) by comparing Urdhva Tiryakbhyam and Nikhilam Sutras with various adder architectures (Carry-Lookahead Adder (CLA), Carry-Select Adder (CSEL), Kogge-Stone Adder (KSA), and Ripple Carry Adder (RCA)). The goal was to identify the optimal combination for speed and resource efficiency. Urdhva Tiryakbhyam with CLA emerged as the fastest option, achieving a minimal delay of 0.709 ns. However, this came at the cost of higher resource utilization, measured in Logic Look-Up Tables (LUTs). Conversely, Nikhilam implementations generally required fewer LUTs, making them more resource-efficient, but they exhibited slightly slower performance. Among the adder architectures, CLA consistently delivered the best delay for both Vedic multiplier types. CSEL offered a minor improvement in clock frequency for Urdhva Tiryakbhyam compared to CLA, but with a trade-off in resource usage. KSA presented a middle ground, offering faster operation (lower delay) but requiring more LUTs. Finally, RCA provided the most resource-efficient design but resulted in the slowest operation. For practical implementation on Xilinx ISE 14.7, all the explored configurations are viable. The key takeaway is that the choice between Urdhva Tiryakbhyam and Nikhilam, along with the specific adder architecture, hinges on the application's priorities. If speed is paramount, Urdhva Tiryakbhyam with CLA is ideal. However, for resource-constrained scenarios, Nikhilam with RCA offers a compelling balance between efficiency and performance. This analysis empowers designers to make informed decisions when implementing a 32-bit MAC unit using Vedic multipliers.