Flattening Power Waveforms by Hamming Distance Converter for Side-channel Attacks
Ryoma Katsube, Taiki Nagatomo, Tomoaki Ukezono · 2024
It has been reported that circuit designs for achieving tamper-resistance require significant implementation area overhead. In this paper, we propose novel circuit design approaches utilizing the power consumption of $\mathrm{S}-\mathrm{box}^{-1}$, a decryption-specific circuit unused during encryption, to resist power analysis attacks. Our proposed designs involve adding a small circuit called the Hamming Distance Converter (HDC), which leverages the power consumption of the unused circuit (S-box ${ }^{-1}$) to conceal the power consumption characteristics of the targeted circuit (S-box) against attacks, thereby enhancing tamper-resistance. Evaluation in this paper demonstrates that our proposed designs can achieve tamper-resistance approaching that of the conventional design, WDDL, but at less than half the area overhead.