Homeothermic P‐Bit Computing Hardware with Stochastic Operations Beyond Limit of Non‐Stochastic Materials
Hoyoung M. Maeng, Joon‐Kyu Han, Janguk Han, Soo Hyung Lee, Sunwoo Cheong, Cheol Seong Hwang, Yang‐Kyu Choi · Advanced Functional Materials · 2024
Abstract Probabilistic computing (p‐computing) is a customized approach for solving complex combinatorial optimization problems. However, issues of compatibility with well‐established complementary metal‐oxide‐semiconductor (CMOS) technology, robustness to environmental temperature variations and stochasticity need to be addressed. This study resolves these difficulties using a metal‐oxide‐semiconductor field‐effect transistor (MOSFET) with a floating body as a probabilistic‐bit (p‐bit) device. Unlike previously reported two‐terminal p‐bit structures, such as magnetic tunnel junction (MTJ) and memristor‐based devices, a MOSFET is commercialized for conventional von Neumann computing. Although MOSFET operation is sensitive to the ambient temperature, a homeothermic characteristic from 20 °C up to 110 °C is achieved with gate voltage ( V G ) control, taking advantage of the three‐terminal design. The conventional MOSFET operation is stable, reproducible, and, thus, non‐stochastic. However, the floating body effect in this specific MOSFET enhances stochasticity, enabling an irregular single transistor latch (STL). Invertible logic operations and a max‐cut solver are demonstrated with the proposed p‐bits, maintaining desirable performance even at 110 °C through V G control. Due to its compatibility with CMOS technology, large‐scale cointegration of a p‐bit array and supportive CMOS circuits is feasible.