XTEA Brute-Force Cracker for FPGA in HLS and HDL
Costin-Emanuel Vasile, Călin Bîră, George-Vlăduț Popescu · 2024
This work presents a study comparing Extended Tiny Encryption Algorithm (XTEA) brute-force cracker C++/hlsand Verilog/HDL implementations on FPGA. The HDL-based implementation outperformed the HLS-based implementation by a factor of 2.8, and it also demonstrated exceptionally low total power dissipation compared to both CPU and GPU implementations.