B-HTRecognizer: Bitwise Hardware Trojan Localization Using Graph Attention Networks
Han Zhang, Zhenyu Fan, Yinhao Zhou, Ying Li · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2024
Hardware Trojans (HTs), which are malicious modifications injected into an integrated circuit (IC) by untrusted vendors, pose a significant threat to circuit design due to their highly destructive nature. The covert characteristics of HTs present challenges for detection methods, such as the requirement for transferable unknown circuit detection, the extensive manual effort involved, and the difficulty in fine-grained localization. To address these issues, we present B-HTRecognizer, a novel learning-based classification methodology that leverages HT similarities to automatically localize HTs in unknown designs at the bit level. In this study, we convert Verilog hardware description language (HDL) design into bit-level edge-featured data flow graphs (DFGs) using graph attention network (GAT) for multidimensional feature extraction of HTs. The bit-level feature extraction can achieve better performance when dealing with Trigger-hidden HTs, which are highly likely to bypass existing GNN solutions. Furthermore, we construct an open-source HT dataset named TrustHub IMEex The HTs dataset is publicly available athttps://www.scidb.cn/en/anonymous/QjNFdmUywhich extends the TrustHub dataset to facilitate effective training and precise localization. Through rigorous experimentation across different designs, our proposed method achieves 84% precision and 93% recall in noncross-design settings, and a recall rate of 77% on a 32-bit RISC-V design in cross-design testing.