An ultra-low-power high-speed variation-resilient DLJLT-PUF for IOT devices
Meena Panchore, Chithraja Rajan, Jawar Singh · Semiconductor Science and Technology · 2024
Abstract Physically unclonable functions (PUFs) have emerged as attractive primitives to resolve the various issues of hardware security in integrated circuits, such as cryptographic key generation and chip authentication. However, the power budget and high performance of the ring oscillator (RO) PUF limits the use of ROPUF in Internet of Things (IoT) applications. Therefore, an ultra-low-power high-performance ROPUF is needed. Hence, in this article, an ultra-low power, high-speed dopingless (DL)-based PUF is presented and its performance compared with the conventional counterpart junctionless transistor-PUF (JLT-PUF). Here, a PUF circuit is designed using 256 ROs and sensitivity analysis is performed for an RO realized with DL and JLT structure for different doping concentrations. We have observed that the DLJLT-RO is variation resilient and hence less susceptible to process variability issues compared to the JLT-RO. The average power and frequency of the DLJLT-RO are improved by ∼27 and ∼12 times than earlier reported work. The proposed DLJLT-PUF is implemented using 15 nm technology, and a Monte Carlo simulation is performed for 100 runs. The simulation result shows that the DLJLT-PUF has a uniqueness of 46.9% and frequency of 9.1 GHz which is higher than earlier reported work. Hence, the proposed DLJLT-PUF is well suited for the application of chip identification as well as cryptographic key generation.