Design and Implementation of Artificial Neural Network Based Low Power Systolic Array Multiplier Using Reversible Gates
N. Bhuvaneswary, Harshavardhan Reddy Eda, S. Shanmuga Priya · 2024
The Artificial Neural Networks (ANNs) are general, biologically-inspired learning and generalization models that mimic the functioning of the human brain. ANNs are collections of interconnected processing units that individually perform weighted sums before evaluating a particular activation function. ANNs are implemented on hardware in order to increase computation performance. For example, operations like Multiply and Accumulation (MAC) consume more computation time, affecting overall performance. MAC implemented using ANN using will results in less computation time. Here, to design the ANN architecture, a reversible compute core is provided. It is a computer model in which the calculation can be partially reversed or invertible in time. Compared with the irreversible circuit, the reversible circuit consumes less power. Therefore, in the calculation process, the reversible circuit consumes more power than the irreversible circuit. The proposed reversible logic-enabled ANN architecture is compact and power-saving. In comparison to existing architectures, the proposed architecture reduces power by 2.44 percent while increasing area by 0.6 percent.