Dora: A Simple Approach to Zero-Knowledge for RAM Programs
Aarushi Goel, Mathias Hall-Andersen, Gabriel Kaptchuk · 2024
Existing protocols for proving the correct execution of a RAM program in zero-knowledge are plagued by a processor expressiveness tradeoff: supporting fewer instructions results in smaller processor circuits (which improves performance), but may result in more program execution steps because non-supported instruction must be emulated over multiple processor steps (diminishing performance).