Energy-Efficient Dataflow Design for Monolithic 3D Systolic Arrays with Resistive RAM
Prachi Shukla, Mohammadamin Hajikhodaverdian, Vasilis F. Pavlidis, Emre Salman, Ayse Kivilcim Coskun · 2024
Systolic arrays are commonly used for running deep neural networks (DNNs) at the edge, where latency and energy efficiency requirements are stringent. Monolithic 3D (Mono3D) is an emerging 3D integration technology that offers ultra-high vertical interconnect density among processing and memory layers. The bandwidth benefits provided by Mono3D can help meet the growing latency and energy efficiency demands for DNNs. This paper presents a novel implementation for weight stationary (WS) dataflow in Mono3D systolic arrays, called WS-Mono3D. WS-Mono3D utilizes multiple resistive RAM layers and SRAM with high-density vertical interconnects to multicast inputs and performs high-bandwidth weight pre-loading while maintaining the same order of multiply-and-accumulate operations as in native WS dataflow. Consequently, WS-Mono3D eliminates input and weight forwarding cycles, and, thus, provides up to a 40% reduction in energy-delay-product (EDP) over the native WS implementation in 2D with iso-configuration. The paper also demonstrates the impact of temperature on energy efficiency benefits in WS-Mono3D.