Hardware Accelerated Vehicle Detection for Dynamic Traffic Scheduling
Timothy Joshua D. Chua, Marc Patrick C. Celon, Paul Grant R. Ilaga, Nestor Michael C. Tiglao · 2024
Since the invention of automobiles and vehicles, heavy traffic has been a widespread problem. In order to solve or mitigate heavy traffic, we propose a traffic signal system that combines techniques such as Dynamic Scheduling, Hardware Acceleration and Computer Vision. Unlike current traffic signal systems where intervals and durations are pre-defined, our proposed system would be able to measure and adjust to traffic density in real life. The system would be composed of Traffic Management Modules that makes use of hardware such as Single-board Computers like the Raspberry Pi and the hardware accelerators such as Zybo Field Programmable Gate Array. The results show that the implementation of the dynamic scheduling traffic system performed better than the static scheduling traffic system especially in a heavy traffic situation where our system outperformed the static scheduling by at least 11.6%. Furthermore, the FPGA was shown to provide a significant speedup in performing the HOG + SVM algorithm in comparison to the purely software implementation from OpenCV. Based on the results, the FPGA performed as much as thirteen times faster than the RASPI. However, there was a slight dip the in accuracy from the FPGA as compared to the RASPI. This is due to the hardware approximations performed by the FPGA to speed up the processing of algorithms. Thus, In exchange for faster computation, a bit of value precision was lost.