DESIGNING LOW POWER DOUBLE TAILED COMPARATOR FOR ECG
Abdul Siya Salim, D. R., A Rahna, S Sruthika, Dr. V. Balamurugan, Dr.Aneesh K. · International Journal of Engineering Applied Sciences and Technology · 2024
While designing ECG systems, one of the chief issues is power consumption, most especially for mobile and wearable devices. This paper proposes the DTLC suitable for both low-end and high-end applications employing double-tailed comparators with negative body biasing to improve power throughout in ECG signal monitoring systems modeled using the Mentor Graphics. Integrated circuit designs with EDA tools using 180nm CMOS technology at a power supply of 0.8V improve power consumption without a decline in the car’s performance. Parameters including power consumption and power-delay product (PDP) are improved with power dissipation reduced from 18.5 from 1.33 μW to 12.5 pW at a clock frequency of 20 kHz and the PDP reduced to 0.251 aJ at 27°C. These optimizations make the proposed comparator highly appropriate for low-power, highperformance ECG systems, especially in portable and wearable medical devices where power as resource utilization and accuracy in delivery are important factors. The design provides a sound platform for the analog to digital transition for the company. Analog-to-digital converters (ADCs) in cardiac signal monitoring as the customer requirement for energy-efficient acoustic elements in the medical industry grows. In this way, power release efficiency is improved, and excessive energy consumption is restrained. According to the accuracy requirements, the proposed comparator can be regarded as the most suitable for the modern ECG applications.