A CMOS Compatible III-V-on-300 mm Si Technology for Future High-speed Communication Systems: and Possibilities
Abhitosh Vais, Abhijeet Kumar, Guillaume Boccardi, Sachin Yadav, Yves Mols, Reynald Alcotte, Bjorn Vermeersch, Mark Ingels, Uthayasankaran Peralagu, César Roda Neve, B. Ghyselen, Bertrand Parvais, Piet Wambacq, Bernardette Kunert, N. Collaert · River Publishers eBooks · 2024
III-V semiconductor-based devices, in particular InP heterojunction bipolar transistors, are a strong contender for next-generation high-speed communication systems. In this paper, we present motivation for the upscaling of HI-V technology on to 300 mm Si platforms. A comparison of various options for such III-V on Si technology is described. The challenges in the way to achieve its integration into existing CMOS platform and possibilities to overcome them are shown. We describe imec’s path to demonstrate a CMOS compatible III-V-on-300 mm Si technology with the most recent results.