FPGA-targeted optimization approaches for SVM and CNN human activity recognition models using the HARTH and HAR70+ datasets
Kei Palabasan, Ramona Rajagopalan, Jean Marriz Manzano, Marc Driz Rosales, Maria Theresa de Leon, John Richard E. Hizon · 2023
Human activity recognition (HAR) has been explored extensively for decades as a use case of machine learning (ML) in low-power embedded applications such as FPGAs. While most existing research has focused on development of classical ML models, recent work targets deep ML models for their capacity to learn effectively on low-quality, noisy datasets. As these models have been widely developed for improved accuracy and recently produced publicly available free-living datasets such as HARTH and HAR70+ have started targeting the issue of reliable annotations, our challenge of interest is model deployment. This study explores optimization approaches specifically for resource-limited FPGA deployment applications. We evaluate their trade-offs in model performance and resource utilization estimates after high-level synthesis (HLS) of representative classical (SVM) and deep (CNN) learning models. Axis and data format reduction were most effective in balancing model performance and resource utilization with single-axis models consuming half the resources estimated for our unoptimized models.