Dynamic Frequency Boosting of RISC-V FPSoCs Through Monitoring Runtime Path Activations
Georgios Anagnostopoulos, Nikolaos Zompakis, Sotirios Xydis · 2024
In this paper, we explore the path activation variability within an FPGA instantiated System-on-Chip (FPSoC) Rocket RISC-V and evaluate the potential improvement in performance under dynamic frequency boosting. We define an analytical performance model and we extend RISC-V with a lightweight activation monitoring framework to enable in-depth analysis. Through an extensive experimental campaign, we explore the timing paths data-dependent activation behavior for realistic workloads, i.e. benchmarks and OS-commands, executed on Linux-based FPGA microprocessor. We show promising frequency boosting margins due to rare activations of the most critical paths delays, leading to potential performance improvements between 18% and 42% including the switching frequency overhead.