Optimized AES for Low Power Devices
K.B. Sarmila, A R Kaarthikeyan, A Kaasiprasanth · 2024
The Advanced Encryption Standard (AES)'s computational speed and flexibility for systems with limited resources are both greatly improved by the unique methodologies introduced in this work. We speed up encryption without compromising security by using bit manipulation techniques for shifting rows and mixing column procedures. Furthermore, to overcome the limitations of fixed key length (128, 192, or 256 bit - length), we suggest an adaptive key size strategy that is adapted to data transfer needs and desired security levels. We recommend incorporating data compression methods as a preprocessing step to further increase efficiency by significantly lowering data size and computing effort. We show how data compression can make it possible to use smaller 64-bit keys in applications like WiFi devices, improving both performance and security. Further simplifying AES procedures is encouraged by our recommendation to swap memory-intensive matrices out for more effective data structures. This comprehensive strategy helps AES meet the requirements of a wide range of resource-constrained applications while also speeding up encryption and decryption procedures.