Linearization Technique for CMOS Differential and Active Resistor Structures
Cosmin Radu Popa · 2024
A novel technique for linearizing the characteristic of the classical MOS differential amplifier will be presented. The new method is based on a particular current biasing of the differential structure, introducing an additional current proportional with the square of the differential input voltage. In order to implement this original method, a new squaring circuit is presented, its symmetrical structure allowing to obtain an excellent accuracy. The linearity error of the differential amplifier can be strongly reduced and the maximal amplitude of the differential input voltage can be increased by using this technique. An other novel application of the proposed technique is the design of active resistors structures, having both positive and negative equivalent resistances. The circuits are developed for implementing in 0.18μm TSMC CMOS technology, SPICE simulations confirming the theoretical estimated results. The maximal simulated range of the differential input voltage is between -200mV and 200mV, for a supply voltage equal with +0.9V/-0.9V. The current consumption of the linear differential amplifier is approximately 9μA for a reference current equal with 1μA. The silicon occupied area for the original linear differential amplifier is 9μm2.