Efficient Multipliers for CNN with Optimized Compression Techniques
Muhammad Usman, Azhar Zahid, Fasih Ud Din Farrukh · 2023
This work presents two different multiplier designs (accurate and fixed-width) based on the Modified Booth Encoding (MBE) to replace the bulky MAC components of CNN. The accurate multipliers suggested in this research enables the efficient implementation of the Wallace tree by generating a regular array of partial products. Probabilistic prediction-based estimation bias is used for error compensation in the proposed fixed-width multiplier. Likewise, instead of using the conventional adder tree, higher-order compressors are employed in the reduction phase of partial product (PP) array. As a result of these optimizations, the suggested designs significantly reduce the hardware consumption as compared to the state-of-the-art implementations. The proposed multiplier designs are implemented in Vivado 2020.1 (using Xilinx Zynq706 board) and Genus (TSMC 65nm CMOS standard cell library) to verify their efficiency. The results show a 16% and 61 % decrease in area as well as in PDP respectively for the proposed fixed-width multiplier in comparison to the SOA multipliers in the literature. The performance of proposed multipliers is also verified for the Tiny-YOLO-v2 network. The results show 25% less consumption of LUTs, a 30% decrease in delay and 2% less value of PDP for CNN as compared to the state-of-the-art implementation of CNN.