Efficient ORBGRAND Implementation With Parallel Noise Sequence Generation
Chao Ji, Xiaohu You, Chuan Zhang, Christoph Studer · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2024
Guessing random additive noise decoding (GRAND) is establishing itself as a universal method for decoding linear block codes, and ordered reliability bits GRAND (ORBGRAND) is a hardware-friendly variant that processes soft-input information. In this work, we propose an efficient hardware implementation of ORBGRAND that significantly reduces the cost of querying noise sequences with slight frame error rate (FER) performance degradation. Different from logistic weight order (LWO) and improved LWO (iLWO) typically used to generate noise sequences, we introduce a reduced-complexity and hardware-friendly method called shift LWO (sLWO), of which the shift factor can be chosen empirically to trade the FER performance and query complexity well. To effectively generate noise sequences with sLWO, we utilize a hardware-friendly lookup-table (LUT)-aided strategy, which improves throughput as well as area and energy efficiency. To demonstrate the efficacy of our solution, we use synthesis results evaluated on polar codes in a 65-nm CMOS technology. While maintaining similar FER performance, our ORBGRAND implementations achieve 53.6-Gbps average throughput ($1.26\times $higher), 4.2-Mbps worst case throughput ($8.24\times $higher), 2.4-Mbps/mm2 worst case area efficiency ($12\times $higher), and$4.66\times 10 ^{{4}}$pJ/bit worst case energy efficiency ($9.96\times $lower) compared with the synthesized ORBGRAND design with LWO for a (128, 105) polar code and also provide$8.62\times $higher average throughput and$9.4\times $higher average area efficiency but$7.51\times $worse average energy efficiency than the ORBGRAND chip for a (256, 240) polar code, at a target FER of$10^{-7}$.