Multi-Protocol Conversion Unit Implementation on a FPGA
Mayank Trehan, Pradeep Kumar, Nidhi Gaur · 2024
In this research paper, The Multi-Protocol Conversion Unit (MPCU), a testing design for MPCU to work on an FPGA and a 7-segment display driver is designed using Hardware Descriptive Language (HDL). The MPCU unit has the functionality of a converter and bridge that is it can take 8-bit inputs as soon as the device enables control is provided. Stores 8 different data on an MPCU RAM and operates according to the Data that is present in the MPCU RAM location 0. The MPCU uses protocols such as Serial Peripheral Interface (SPI) and Inter-Integrated Circuit (I2C). According to the operation mode, the device will perform one out of the seven modes described for MPCU. This device can perform data transfer to slaves from the micro controller or it can isolate the micro controller and transfer data from one slave to another without the micro controller accessing the data. Thus, we can have one single device for faster transfer of data to the protocols slave devices. The device is tested on a Numato Mimas spartan-6-based FPGA board. The design takes data from 8 switches as 8-bit data and stores it on the MPCU RAM at any moment when the data is pushed onto it by pressing the Push Data button. The output of SPI Test RAM and I2C Test RAM can be accessed via the 7-Segment display. To access this data from different locations of the Test RAM a separate Address Increment control is provided. Another switch is the Input (I) / Output (O) RAM switch can switch between the Input MPCU RAM, Output SPI Test RAM, and Output I2C Test RAM. This device has several benefits over the conventional SPI and I2C master individually.