Experimental demonstration of a compact spintronics-based platform with high-quality tunable random number generation for probabilistic computing
John Sagar Daniel, Zheng Sun, Xuejian Zhang, Yuanqiu Tan, N. R. Dilley, Zhihong Chen, Joerg Appenzeller · 2024
For certain applications such as in Artificial Intelligence and neuromorphic computing, modern computing schemes can require prohibitively large circuit- and energy-footprints. Probabilistic computing offers an alternative approach that seeks to exploit its inherently probabilistic nature to act as low-cost natural hardware accelerators for solving a range of complex problems from large-scale combinatorial optimization to Bayesian inference, and invertible Boolean logic. The base unit of probabilistic computing is known as the probabilistic bit, or p-bit, and requires tunable stochasticity; low-barrier Magnetic Tunnel Junctions (MTJs), in which the magnetization of the free layer fluctuates at room-temperature, are a natural spintronics-based solution for such high-quality random number generation and p-bit purposes. In this work, we present the experimental realization of a scaled p-bit core, integrating a stochastic in-plane MTJ with a novel multi-finger 2D-MoS2 transistor to achieve a compact spintronics-based p-bit platform that displays true randomness and a high degree of voltage-tunable stochasticity.