Physically Unclonable and Reconfigurable Circuits for IP Protection: Opportunities and Challenges
Mrittika Chowdhury, Mahmudul Hasan, Tamzidul Hoque, Md Sakib Hasan · 2024
Solutions to protect Hardware Intellectual Property (IP) are crucial to safeguard against various hardware security threats, including IP piracy, theft, and reverse engineering. Logic locking, a prominent design transformation technique, aims to mitigate these attacks by introducing additional logic into the circuit to enable the locking of design functionality and hiding of the design intent based on a secret key. However, most existing logic locking schemes are vulnerable to a range of invasive and non-invasive attacks that can unlock the design, compromising their effectiveness. In this paper, we summarize these major threats and discuss a potential approach of replacing conventional logic gates with analog chaos-based gates to mitigate these threats. The novel chaos-based locking mechanism offers unclonability and reconfigurability, making it challenging for attackers to apply the well-known attack vectors, including SAT-based attacks, physical attacks, and side-channel attacks. We also discuss the challenges of integrating this novel approach compared to an existing locking method and provide a discussion on future research directions to address them.