Design of Frequency Synthesizer Based on PLL Architecture at X-band
Dong-Yi Huang, Xiao‐Wei Zhu, Xian‐Long Yang, Lu Qiu, Shi-Hang Yan · 2024
This paper describes a Phase-Locked Loop (PLL) frequency synthesizer with a frequency range of 9.5 GHz-10.8 GHz. The PLL synthesizer is based on a frequency synthesizer chip ADF4159 and a voltage controlled oscillator (VCO) chip HMC530. The output of VCO passes through a directional coupler as final frequency output, while coupling back as feedback signal to the frequency synthesizer chip simultaneously. The reference signal is provided by an external crystal oscillator, and an active loop filter is used to amplify the tuned voltage. Final experiment results show that output power is 3.95 dBm and phase noise is better than -82 dBc/Hz@lkHz at 9.568 GHz.