THE DATA TRANSFER METHOD IN HETEROGENEOUS INTEGRAL CIRCUITS
G.A. Harutyunyan · P R O C E E D I N G S OF NATIONAL POLYTECHNIC UNIVERSITY OF ARMENIA INFORMATION TECHNOLOGIES ELECTRONICS RADIO ENGINEERING · 2024
The developed method of data transfer between internal functional components of heterogeneous integrated circuits (IC) is presented. The main feature of the latter lies in the use of a modified architecture of heterogeneous ICs. Due to this, the presented method provides a significant reduction in the number of power buses between cores at the ex-pense of a slight increase in the occupied surface on the die. Multi-core central processing units (CPUs) provide parallelism at the level of executed commands. For example, a dual-core processor can provide up to twice the performance of a single-core processor at the same frequency. A synchronizer architecture is also proposed based on the use of an ana-log signal comparator instead of additional cascades to detect the metastable state at the output of the first cascade. It can serve as a basis for the design of synchronizers with a complex structure. a method of improving the means of data transfer between component parts in heterogeneous integrated circuits has been proposed, which, due to the modified architecture, provides a significant reduction in the number of power buses between cores, at the expense of a slight increase in the area of the core. An architecture of a syn-chronizer based on the use of an analog signal comparator instead of additional cascades to detect the metastable state at the output of the first cascade has also been proposed.