A Comparison of CMOS and Bi-CMOS Semiconductor Technology for Miniaturized PLL Chip Performance for High Frequency Synthesizers
Pankaj S. Bhavsar, Harshita Tolani, Jolly Dhar, CVN Rao, Nilesh M. Desai · 2024
This paper presents a novel comparison of CMOS and BiCMOS semiconductor technology for Low power, ultra-low noise, Wideband reconfigurable and Miniaturized PLL chip-based frequency synthesizers. Here for comparison indigenously developed L band BiCMOS PLL-VCO chip have been used with designed and developed CMOS PLL-VCO chip. Here HBT NPN transistors specially used from Sbc18h2 180 nm BiCMOS process for Ultra-low noise and High frequency PLL-VCO chip design with better spurious rejection. Similarly, SCL Ts18SL 180 nm CMOS process has been used for the design and development of wideband, low power, reconfigurable (L to S band) PLL-VCO chip design.