Test Point Selection for Multi-Cycle Logic BIST using Multivariate Temporal-Spatial GCNs
Senling Wang, Shaoqi Wei, Hisashi Okamoto, Tatusya Nishikawa, Hiroshi Kai, Yoshinobu Higami, Hiroyuki Yotsuyanagi, Ruijun Ma, Tianming Ni, Hiroshi Takahashi, Xiaoqing Wen · 2024
This paper proposes a novel Test Point Insertion (TPI) strategy to enhance the testability for multi-cycle Built-In Self-Test (BIST) for logic circuits. The approach leverages Multivariate Temporal-Spatial Graph Convolutional Neural Networks (MTS-GCN) and Reinforcement Learning to identify optimal Test Points (TPs). The proposed TPI method treats the testability information of a logic circuit as time-series data and employs Multivariate Time-Series Graph Neural Networks (MTGNN) to capture the relationship between the circuit's structural (spatial information) attributes and the temporal variability of signal line testability across capture cycles. A subsequent Multi-Layer Perceptron (MLP) computes the metric for each signal line to pinpoint potential TPs based on the extracted temporal-spatial features. Experimental evaluation based on benchmark circuits confirms the efficacy of the proposed model, which is trained with Deep Q-Networks (DQN), in improving the fault detection for multi-cycle logic BIST.