A Hardware Security Evaluation Platform on RISC-V SoC
Xiaolong Cheng, Aijiao Cui, Yier Jin · 2024
The escalating complexity of integrated circuits (ICs) enables a substantial computational power, yet also results in a challenging verification of vulnerability. Effective and efficient verification of ICs in a high design complexity turns to a great concern to be solved. This paper presents a hardware security evaluation platform constructed on the open-source RISC-V System-on-Chip (SoC) - OpenPiton to facilitate the development of the techniques on design vulnerability discovery. Some pertinent hardware vulnerabilities are compiled and integrated into both the processor core and the peripheral modules of the OpenPiton hardware platform.