FPGA Verification of Generalized LDPC Convolutional Codes with Hamming Code
Yinlong Shi, Kai Tao, Zitao Wei, Jian Wang · 2024
Employing FPGA emulations, we investigate the performance of the hybrid check generalized LDPC convolutional code, and reveal that a small proportion of generalized check nodes can not effectively decrease the error floor down to 10-15.