Analog Implementation of Weighted Median Filter
M. Kaliamoorthy, Vasna lija SJ, Nithish Kumar D, B Mukeshkumar · 2024
This paper presents an analog implementation of a Weighted Median Filter (WMF) using 90nm CMOS (Complementary Metal-Oxide-Semiconductor) technology. WMF is an effective tool for image denoising because it can preserve edges while effectively reducing noise. The proposed analog implementation takes advantage of CMOS technology's low power consumption and compact size to realize a hardwareefficient solution appropriate for real-time applications. The design begins with a detailed analysis of the weighted median filtering algorithm, with a focus on the computation of the weighted median and its implementation challenges in the analog domain. Additionally, submicron CMOS technologies' inherent process fluctuations and device mismatch are minimized through the optimization of the analog circuitry. Sizing optimization and biasing are two strategies used to guarantee reliable performance around corners of the process. The suggested analog weighted median filter effectively suppresses noise while maintaining image features, as shown by the simulation results. The concept can be integrated into highperformance, low-power imaging systems since it achieves competitive performance metrics in terms of mean square error (MSE), processing speed, and signal-to-noise ratio (SNR). All things considered, this study advances the use of analog signal processing methods in contemporary semiconductor technology and provides a workable answer for noise reduction in image sensor applications in real time.