High-level synthesis-based watermarking using crypto-chain signature framework
Anirban Sengupta, Aditya Anshul · 2024
Designing reusable hardware intellectual property (IP) core (such as JPEG-CODEC) for multimedia/electronic systems involves managing competing design goals like latency and area during high-level synthesis (HLS). Additionally, it requires addressing the critical aspect of hardware security to prevent IP piracy and false IP ownership claim. This chapter discusses the generation of low-cost, secure IP design using the firefly algorithm (FA) based space exploration or design space exploration (DSE) and crypto-based watermarking (security) framework. The discussed crypto (key-driven) watermarking approach leads to the generation of watermarking constraints, which are further implanted into the hardware design through an HLS-based embedding process. This discussed low-cost security methodology facilitates IP piracy detection and resolution of false IP ownership assertion.