Multi-Strategy Bus Deviation-Driven Layer Assignment Algorithm
Yantao Yu, Zepeng Li, Jiarui Chen, Xing Huang, Genggeng Liu, Ning Xu · 2024
In modern very large-scale integration (VLSI) design, the solution quality of the bus routing is a crucial factor that determines the timing and power of circuit, and finally affects the performance and yield of chips. Taking bus deviation as the main optimization objective, an effective multi-strategy bus deviation-driven layer assignment algorithm is proposed to solve the timing-matching problem of bus routing. First, a net priority determination method that integrates multiple features is presented to determine the layer assignment order, thus obtaining a routing sequence which can weigh the wirelength and bus deviation well. Second, an effective single net layer assignment algorithm is proposed to assign each net based on dynamic programming, thus reducing the number of vias. Third, a layer shifting strategy based on the bus lookup table is designed to effectively balance total wirelength and bus deviation by sacrificing a certain number of vias. Experimental results, compared to existing work, show that the proposed algorithm can achieve significant optimization on the bus deviation and total wirelength, and finally obtain the best results in terms of the bus deviation, which is the most important optimization objective for bus routing.