Low-latency Elliptic Curve Scalar Multiplication Accelerator on FPGA
Anawin Opasatian, Makoto Ikeda · 2024
Elliptic curve cryptography (ECC) is an important building block for providing us with digital security nowadays and likely also in the future. Being able to compute the elliptic curve scalar multiplication (ECSM) fast would make the realtime complex cryptosystem more practical to be used in our lives. To meet those needs, we propose minor optimizations to Lookup Table Modular Reduction (LUTMR) to further reduce the modular multiplication latency. Then, we propose the ECSM accelerator that builds on a 5-stage modular multiplier based on the LUTMR technique together with a tight schedule for computing the Add/Double Mongomery ladder. Our architecture works on any Weierstrass curve, is constant-time, and is protected from simple power analysis (SPA). We demonstrate its performance by implementing the accelerator on Virtex 7 (Virtex Ultrascale+) FPGA for five curves which are Secp256k1, NIST-P256, BN254, NIST-P381, and BLS12-381. The latency for computing ECSM are $53.3,52.6,53.2,88.1$, and $71.8 \mu \mathrm{s}(27.1,27.8,29.2,44.5$, and $40.8 \mu \mathrm{s})$ respectively. These are the lowest ever reported latency among the state-of-the-art architecture while also lowest in the normalized area-time criteria among the generic architecture.