A Survey of High-Level Synthesis-Based Hardware (IP) Watermarking Approaches
Anirban Sengupta, Aditya Anshul · IEEE Design and Test · 2024
Editor’s notes: Hardware watermarking is an integral component of modern hardware security against threats pertaining to the supply chain. In this article, the authors present a thorough survey regarding the application of high-level synthesis for hardware watermarking. They explain their methodology using qualitative and quantitative analysis of various hardware watermarking techniques. —Kanad Basu, University of Texas at Dallas, USA