Monza: An Energy-Minimal, General-Purpose Dataflow System-on-Chip for the Internet of Things
Nathan Beckmann, Brandon Lucia, Graham Gobieski, Tony Nowatzki, Thomas Jackson, Guénolé Lallement, Keyi Zhang, Amolak Nagi, Atharv Sathe, Harsh Desai · IEEE Micro · 2024
This article describes the design and implementation of Monza, a testchip system-on-chip featuring Efficient Computer Company’s Fabric processor. The Fabric is a general-purpose, spatial dataflow architecture and compiler designed to minimize energy. The Fabric offers a unique combination of familiar software DevOps and extreme energy efficiency. Monza includes a small Fabric processor, RISC-V core, 1-MB static random-access memory, digital I/O, and integrated clock generation and power conversion. Monza is implemented in 22-nm FD-SOI and was taped out in quarter 4 of 2023. Signoff timing and power simulations estimate Fabric efficiency of up to 1250 GOPS/W on dense convolution written in C.